1. Field of the Invention
The present invention generally relates to semiconductor integrated circuits, and particularly to a semiconductor integrated circuit that has power supply lines provided in cell areas inside the chip.
2. Description of the Related Art
In semiconductor integrated circuits, the power supply voltage is provided from an external pin to an internal cell through a lead frame, a bonding wire, a pad, and a power supply I/O. The power supply I/O is an area section comprised of an aluminum wire that exists between a pad and a main power supply line connected to the internal cell, and that is provided for each pad on which a bonding wire is connected. The power supply I/O may be equipped with a circuit for preventing damage caused by static charge. Connection between the pad and the power supply I/O is provided through a multi-layered wire structure. Between the power supply I/O and the main power supply line connected to the internal cell area, on the other hand, a connection is generally provided through a single layer structure, and is implemented by using a narrower wire width than the power supply I/O.
As the number of pins in semiconductor integrated circuits increases, the pitch of bonding pads becomes increasingly short. As a result of this, the width of a power supply I/O cell (i.e., a section where the power supply I/O is situated) becomes increasingly narrow.
Under such circumstances, a wire line leading from a power supply I/O cell to a main power supply line becomes narrow, resulting in an inability to support a sufficient current running through the wire line. The amount of current supplied to the internal cell area thus becomes insufficient.
Accordingly, the present invention provides a semiconductor integrated circuit which can supply a sufficient amount of electric current to internal cell areas.